Embedded Scanner Parameter Module Delivers Improved OPC Accuracy, Enhanced Model Predictability and Reduced Time to Silicon for Mutual Customers Nikon and Synopsys Announce Manufacturing-Aware
DFM Solution for 45 nm and Below
September 19, 2007
Nikon Corporation (Michio Kariya, President) and Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design and manufacturing software, today announced that Nikon's proprietary optical lithography exposure tool data is available for the latest release of the Synopsys Proteus optical proximity correction (OPC) software. As part of an ongoing collaboration, the two companies developed an embedded scanner parameter module, which delivers the "manufacturing-aware" OPC and resolution enhancement technology (RET) lithography simulation models needed for advanced 45-nanometer (nm) and below IC (integrated circuit) manufacturing. Mutual customers can benefit from improved OPC model accuracy and reduced time to silicon.
At 45 nm and below, critical dimension (CD) control takes place at the single nanometer level, pushing current OPC/RET models and optical-lithography system performance to extreme limits. Current OPC design tools use idealized models of lithography tools to correct for optimal proximity effects of the mask pattern. Only by iteratively adjusting the mask pattern and comparing the simulated model to the calibrated exposure results can the mask pattern be optimized. This approach may not produce accurate, predictable models and therefore may not be suitable for OPC at advanced technology nodes.
To address this challenge, Nikon and Synopsys undertook a collaboration last year with the goal of delivering a "manufacturing-aware" OPC solution that provides improved modeling accuracy for their mutual customers, thereby reducing the cost of development at advanced nodes. The newly developed interface allows Proteus modeling customers to automatically access Nikon's proprietary scanner information, including such higher-order lithographic effects as polarization, flare, synchronization, and various aberration data for the following Nikon exposure systems: NSR-S610C, NSR-S609B, and NSR-S308F. Because models created with this methodology can accurately predict lithographic printing effects previously missed with traditional "idealized" OPC models, this new integration significantly increases OPC modeling accuracy and reduces OPC modeling time. This new functionality is available for the latest production release of Proteus.
"Together with Synopsys, we have shown the benefits of using an accurate scanner model for OPC development," stated Toshikazu Umatate, executive officer, Precision Equipment Company, Nikon Corporation. "By incorporating our proprietary scanner information into the Proteus software, Nikon customers can gain a competitive advantage with improved OPC accuracy and faster optimization time."
"Proteus OPC has demonstrated significant technology leadership. It's been in production for 10 years and seven consecutive technology nodes, delivering significant software performance improvement year over year. Combining proprietary lithography information from Nikon with Proteus mask-synthesis moves OPC accuracy into a new domain leading to improved CD control at 45 nanometers and below," said Dr. Wolfgang Fichtner, senior VP and general manager, Silicon Engineering Group at Synopsys. "This collaboration will help our mutual customers achieve their model production and yield goals, thereby reducing their overall cost of ownership."
- About Synopsys
- Synopsys, Inc. (NASDAQ:SNPS) is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading system and semiconductor design and verification platforms, IC manufacturing and yield optimization solutions, semiconductor intellectual property and design services to the global electronics market. These solutions enable the development and production of complex integrated circuits and electronic systems. Through its comprehensive solutions, Synopsys addresses the key challenges designers and manufacturers face today, including power management, accelerated time to yield and system-to-silicon verification. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.
- The information is current as of the date of publication. It is subject to change without notice.